Referring to FIG. 1, a network of computers 100 includes a first computer 102, a second computer 104, a third computer 106, and a fourth computer 108 interconnected to each other via a linking network 110. A computer network peripheral device 112 is within the first computer 102 to provide added functionality to the first computer 102. The computer network peripheral device 112 may be an Ethernet computer network peripheral device which allows the first computer 102 to communicate with the other computers 104, 106, and 108 via the linking network 110. The first computer 102 is a host computer system to the computer network peripheral device 112.
The computer network peripheral device 112 receives data packets for the host computer system 102 via the linking network 110 from another computer in the computer network 100. Alternatively, the computer network peripheral device 112 also transmits data packets from the host computer system 102 via the linking network 110 to another computer in the computer network 100. In the case the computer network peripheral device 112 receives data packets, such received data packets are written into a storage unit 114 of the host computer system 102 for further processing of such received data packets by the host computer system 102. The storage unit 114 may be any data storage device such as a RAM (Random Access Memory). The computer network peripheral device receives or transmits data packets according to standard data communications protocols for computer networks such as the IEEE 802.3 or the DIX Ethernet data communications protocols as is known to one of ordinary skill in the art.
Referring to FIG. 2, a format for a data packet 200 is shown which may be according to the IEEE 802.3 or the DIX Ethernet data communications protocols. Such a format includes a header field 202 which includes a destination address field 204, a source address field 206, and a length/type field 208. The destination address field 204 is comprised of six bytes of information indicating the address of a computer or computers within the computer network 100 that are intended recipients of the data packet 200. The source address field 206 is comprised of six bytes of information indicating the address of the computer within the computer network 100 that transmitted the data packet 200.
The length/type field 208 is comprised of two bytes of information for indicating the number of bytes in protocol header and data fields 209 and 210 respectively of the data packet 200. Alternatively, the length/type field 208 may contain information for indicating the type of computer network communications protocol for which the data packet 200 is formatted. The protocol header field 209 and the protocol data field 210 are typically comprised of between 46 and 1500 bytes of data information. The protocol header field 209 may contain information regarding data within the protocol data field 210 according to another data communications protocol for formatting data within the protocol data field 210. The FCS (Frame Check Sequence) field 212 includes a checksum that has been generated by the computer transmitting the data packet 200. This checksum is read by the computer receiving the data packet 200 to determine if any data within the data packet 200 has been corrupted. The format of data packet 200 of FIG. 2 is by way of example only, and one of ordinary skill in the art may practice the present invention for any other data packet format.
Referring to FIG. 1, when the computer peripheral device 112 receives the data packet 200, the data packet 200 is transferred to the storage unit 114 of the host computer system 102 for further processing. In a conventional computer network peripheral device, the whole data packet upon reception by the computer peripheral device 112 is sequentially transferred to the storage unit 114. If multiple data packets were to be received by the computer network peripheral device, each such data packet is sequentially transferred in entirety to the storage unit 114 before another data packet is then sequentially transferred in entirety to the storage unit 114 in a conventional computer network peripheral device.
However, such sequential transfer on a whole data packet by whole data packet basis may slow down the processing of data packets by the host computer system 102. Such a sequential transfer on a whole data packet by whole data packet basis may take a longer time to transfer a plurality of data packets to the host computer system 102. In addition, the host computer system may not require a portion of a data packet for processing that data packet. Thus, in the sequential transfer of a whole data packet by whole data packet, processing time is wasted in transferring the whole data packet even when the whole data packet may not be required.